Vertically Integrated Sensor Array (VISA)

The Vertically Integrated Sensor Array (VISA) project aims to exploit 3D integration, where multiple wafers can be stacked and connected using through vias, to design IR sensor arrays with dynamic range of 120dB at 10,000 frames/sec. Our group has focused on exploring new high dynamic range sensor architectures that can achieve these aggressive goals with low power and using simple robust circuits. We investigated existing HDR sensor architectures and found that the Multiple Capture scheme can achieve high dynamic range at high signal fidelity, but cannot meet the speed requirements. Synchronous self-reset, on the other hand, can achieve the high dynamic range and high-speed requirements, but suffers from poor signal fidelity. The group has developed a new high dynamic range sensor architecture called Folded Multiple Capture, which by combining aspects from these two schemes, can achieve over 120dB of dynamic range at 1000 frames/s with high signal fidelity, low power consumption, and using simple robust circuits.

The work on the VISA project is a natural extension of our earlier work on the Digital Pixel Sensor (DPS) and associated high dynamic range algorithms, which was performed under the Programmable Digital Camera project. DPS exploits CMOS technology scaling to integrate A/D conversion at the each pixel. This massively parallel A/D conversion and digital readout enable ultra high speed readout, which can be used to enhance sensor dynamic range among other applications.

Faculty

Students

Sam Kavusi
Sang-Min Lee
Kunal Ghosh

Former Students

Khaled Nabil Salama
Sukhwan Lim
Ting Chen

Funding

DARPA Microsystems Technology Office Award No. N66001-02-1-8940.